74HC259-Q100 데이터 시트보기 (PDF) - NXP Semiconductors.

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74HC259-Q100

8-bit addressable latch

NXP Semiconductors. 

NXP Semiconductors

74HC259-Q100; 74HCT259-Q100

8-bit addressable latch

VCC

LE input

GND

VCC

D input

GND

VM

tsu

th

VM

tsu

th

VOH

Qn output

Q=D

VM

VOL

Q=D

001aah125

Measurement points are given in Table 9.

The shaded areas indicate when the input is permitted to change for predictable output performance.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 10. Data input to latch enable input set-up and hold times

VCC

An input

GND

VCC

LE input

GND

VM ADDRESS STABLE

tsu

th

VM

001aah126

Measurement points are given in Table 9.

The shaded areas indicate when the input is permitted to change for predictable output performance.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 11. Address input to latch enable input set-up and hold times

Table 9. Measurement points

Type

Input

74HC259-Q100

74HCT259-Q100

VM

0.5VCC

1.3 V

Output

VM

0.5VCC

1.3 V

VX

0.1VCC

0.1VCC

VY

0.9VCC

0.9VCC

74HC_HCT259_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 30 July 2012

© NXP B.V. 2012. All rights reserved.

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