74HC4046AN 데이터 시트보기 (PDF) - Philips Electronics

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74HC4046AN

Phase-locked-loop with VCO

Philips Electronics 

Philips Semiconductors

Phase-locked-loop with VCO

Product specification

74HC/HCT4046A

SYMBOL PARAMETER

tPHZ/

tPLZ

tTHL/

tTLH

VI (p-p)

3-state output disable

time SIGIN, COMPIN

to PC2OUT

output transition time

AC coupled input

sensitivity

(peak-to-peak value)

at

SIGIN or COMPIN

Tamb (°C)

TEST CONDITIONS

74HCT

+25

−40 to +85

UNIT

−40 to +125

VCC

(V)

OTHER

min. typ. max. min. max. min. max.

36 65

81

98 ns 4.5 Fig.17

7 15

19

22 ns 4.5 Fig.16

15

mV 4.5 fi = 1 MHz

VCO section

GND = 0 V; tr = tf = 6 ns; CL = 50 pF

SYMBOL PARAMETER

∆f/T

frequency stability

with temperature

change

+25

min. typ.

fo

VCO centre frequency 11.0 17.0

(duty factor = 50%)

∆fVCO

VCO frequency

0.4

linearity

δVCO

duty factor at VCOOUT

50

Tamb (°C)

TEST CONDITIONS

74HCT

−40 to +85

UNIT

−40 to +125

VCC

(V)

OTHER

max min. max min. max.

0.15

%/K 4.5

VI = VVCOIN withi

n recommended

range;

R1 = 100 kΩ;

R2 = ∞;

C1 = 100 pF;

see Fig.18b

MHz 4.5

VVCOIN = 1/2 VCC

;

R1 = 3 kΩ;

R2 = ∞;

C1 = 40 pF;

see Fig.19

% 4.5 R1 = 100 kΩ;

R2 = ∞;

C1 = 100 pF;

see Figs 20

and 21

% 4.5

1997 Nov 25

18

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