74HC165(2017) 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HC165 Datasheet PDF : 22 Pages
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Nexperia
74HC165; 74HCT165
8-bit parallel-in/serial out shift register
CP
CE
DS
PL
D0
D1
D2
D3
D4
D5
D6
D7
Q7
Q7
Figure 6. Timing diagram
inhibit
load
serial shift
mna993
8 Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
Min
Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
-0.5 V < VO < VCC + 0.5 V
Tamb = -40 °C to +125 °C
-0.5
[1]
-
[1]
-
-
-
-50
-65
[2]
-
+7
V
±20
mA
±20
mA
±25
mA
50
mA
-
mA
+150 °C
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO16 Packages: Ptot derates linearly with 8 mW/K above 70 °C.
For (T)SSOP16 Packages: Ptot derates linearly with 5.5 mW/K above 60 °C.
For DHVQFN16 Packages: Ptot derates linearly with 4.5 mW/K above 60 °C.
74HC_HCT165
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 21 August 2017
© Nexperia B.V. 2017. All rights reserved.
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