74HC165D(2017) 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HC165D Datasheet PDF : 22 Pages
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Nexperia
74HC165; 74HCT165
8-bit parallel-in/serial out shift register
VI
PL input
VM
GND
VI
tW
trec
CE, CP input
GND
VOH
VM
tPHL
Q7 or Q7 output
VM
VOL
mna988
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Figure 8. The parallel load (PL) pulse width, the parallel load to output (Q7 or Q7) propagation delays, the parallel
load to clock (CP) and clock enable (CE) recovery time
VI
D7 input
VM
GND
VOH
tPLH
tPHL
Q7 output
VM
VOL
VOH
tPHL
tPLH
Q7 output
VM
VOL
mna989
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Figure 9. The data input (D7) to output (Q7 or Q7) propagation delays when PL is LOW
74HC_HCT165
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 21 August 2017
© Nexperia B.V. 2017. All rights reserved.
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