Philips Semiconductors
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state
Product specification
74AHC595; 74AHCT595
74AHCT family
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER
VIH
HIGH-level input
voltage
VIL
LOW-level input
voltage
VOH
HIGH-level output
voltage
VOL
LOW-level output
voltage
II
input leakage
current
IOZ
3-state output
OFF-state current
ICC
∆ICC
CI
quiescent supply
current
additional
quiescent supply
current per input
pin
input capacitance
TEST CONDITIONS
OTHER
25
VCC (V)
MIN. TYP.
4.5 to 5.5 2.0 −
4.5 to 5.5 − −
VI = VIH or VIL; 4.5
IO = −50 µA
VI = VIH or VIL; 4.5
IO = −8.0 mA
VI = VIH or VIL; 4.5
IO = 50 µA
VI = VIH or VIL; 4.5
IO = 8.0 mA
VI = VIH or VIL
5.5
4.4 4.5
3.94 −
−0
−−
−−
VI = VIH or VIL; 5.5
VO = VCC or GND
per input pin;
−−
other inputs at
VCC or GND;
IO = 0
VI = VCC or GND; 5.5
IO = 0
−−
VI = VCC − 2.1 V 4.5 to 5.5 − −
other inputs at
VCC or GND;
IO = 0
−
−3
Tamb (°C)
−40 to +85 −40 to +125 UNIT
MAX. MIN. MAX. MIN. MAX.
−
2.0 −
2.0 −
V
0.8 − 0.8 − 0.8 V
−
4.4 −
4.4 −
V
−
3.8 −
3.70 −
V
0.1 − 0.1 − 0.1 V
0.36 − 0.44 − 0.55 V
0.1 − 1.0 − 2.0 µA
±0.25 − ±2.5 − ±10.0 µA
4.0 −
1.35 −
40 −
1.5 −
80 µA
1.5 mA
10 − 10 − 10 pF
2000 Mar 15
9