
Philips Semiconductors
Octal D-type flip-flop; positive edge-trigger; 3-state
AC WAVEFORMS
Product specification
74AHC574;
74AHCT574
handbook, full pagewidth
VI
CP INPUT
GND
Qn OUTPUT
1/fmax
VM(1)
tW
tPHL
VM(1)
tPLH
MNA200
FAMILY
AHC
AHCT
VI INPUT
REQUIREMENTS
GND to VCC
GND to 3.0 V
VM
INPUT
50% VCC
1.5 V
VM
OUTPUT
50% VCC
50% VCC
Fig.6 The clock (CP) to output (Qn) propagation delays.
handbook, full pagewidth
VI
OE INPUT
GND
OUTPUT
LOW-to-OFF
OFF-to-LOW
VCC
VOL
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
VOH
GND
VM(1)
tPLZ
tPZL
tPHZ
VOL + 0.3 V
VOH − 0.3 V
VM
tPZH
VM
outputs
enabled
outputs
disabled
outputs
enabled
MNA450
FAMILY
AHC
AHCT
VI INPUT
REQUIREMENTS
GND to VCC
GND to 3.0 V
VM
INPUT
50% VCC
1.5 V
VM
OUTPUT
50% VCC
50% VCC
Fig.7 The 3-state enable and disable times.
1999 Jun 16
12