Philips Semiconductors
8-input NAND gate
Product specification
74AHC30; 74AHCT30
DC CHARACTERISTICS
Family 74AHC
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
Tamb (°C)
SYMBOL PARAMETER
OTHER
25
−40 to +85 −40 to +125 UNIT
VCC (V)
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VIH
HIGH-level input
voltage
2.0
1.5 −
−
1.5 −
1.5 −
V
3.0
2.1 −
−
2.1 −
2.1 −
V
5.5
3.85 −
−
3.85 −
3.85 −
V
VIL
LOW-level input
voltage
2.0
−−
0.5 − 0.5 − 0.5 V
3.0
−−
0.9 − 0.9 − 0.9 V
5.5
−−
1.65 − 1.65 − 1.65 V
VOH
HIGH-level output VI = VIH or VIL
voltage
IO = −50 µA
2.0
1.9 2.0 −
1.9 −
1.9 −
V
IO = −50 µA
3.0
2.9 3.0 −
2.9 −
2.9 −
V
IO = −50 µA
4.5
4.4 4.5 −
4.4 −
4.4 −
V
IO = −4.0 mA 3.0
2.58 −
−
2.48 −
2.40 −
V
IO = −8.0 mA 4.5
3.94 −
−
3.8 −
3.70 −
V
VOL
LOW-level output VI = VIH or VIL
voltage
IO = 50 µA
2.0
−0
0.1 − 0.1 − 0.1 V
IO = 50 µA
3.0
−0
0.1 − 0.1 − 0.1 V
IO = 50 µA
4.5
−0
0.1 − 0.1 − 0.1 V
IO = 4.0 mA
3.0
−−
0.36 − 0.44 − 0.55 V
IO = 8.0 mA
4.5
−−
0.36 − 0.44 − 0.55 V
II
input leakage
VI = VCC or GND 5.5
−−
0.1 − 1.0 − 2.0 µA
current
IOZ
3-state output
VI = VIH or VIL;
5.5
−−
±0.25 − ±2.5 − ±10.0 µA
OFF current
VO = VCC or GND
ICC
quiescent supply VI = VCC or GND; 5.5
−−
2.0 − 20 − 40 µA
current
IO = 0
CI
input capacitance
−
−3
10 − 10 − 10 pF
1999 Nov 30
6