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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

10XS3435(2009) 데이터 시트보기 (PDF) - Freescale Semiconductor

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10XS3435
(Rev.:2009)
Freescale
Freescale Semiconductor 
10XS3435 Datasheet PDF : 51 Pages
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FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
GROUND (GND)
These pins are the ground for the device.
POSITIVE POWER SUPPLY (VPWR)
This pin connects to the positive power supply and is the
source of operational power for the device. The VPWR
contact is the backside surface mount tab of the package.
SERIAL OUTPUT (SO)
The SO data pin is a tri-stateable output from the shift
register. The SO pin remains in a high-impedance state until
the CS pin is put into a logic [0] state. The SO data is capable
of reporting the status of the output, the device configuration,
the state of the key inputs, etc. The SO pin changes state on
the rising edge of SCLK and reads out on the falling edge of
SCLK. SO reporting descriptions are provided in Table 23,
page 39.
HIGH SIDE OUTPUTS (HS3, HS1, HS0, HS2)
Protected 10 mΩ and 12 mΩ high side power outputs to
the load.
FAIL-SAFE INPUT (FSI)
This pin incorporates an active internal pull-up current
source from internal supply (VREG). This enables the
watchdog time-out feature.
When the FSI pin is opened, the Watchdog circuit is
enabled. After a watchdog timeout occurs, the output states
depends on IN[0:3].
When the FSI pin is connected to GND, the watchdog
circuit is disabled. The output states depends on IN[0:3] in
case of VDD Failure condition, in case VDD failure detection
is activated (VDD_FAIL_en bit sets to logic [1]).
Analog Integrated Circuit Device Data
Freescale Semiconductor
10XS3435
25

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