RAS#
V
V
IH
IL
CASL#/CASH# VVIIHL
ADDR VVIIHL
Q
V
V
OH
OL
RAS#-ONLY REFRESH CYCLE
(OE# and WE# = DON’T CARE)
tRC
tRAS
16Mb: 1 MEG x16
EDO DRAM
tRP
tCRP
tRPC
tASR
tRAH
ROW
OPEN
ROW
RAS# VVIIHL
CASL#/CASH# VVIIHL
DQ
V
V
OH
OL
WE#
V IH
V IL
CBR REFRESH CYCLE
(Addresses and OE# = DON’T CARE)
tRP
tRAS
NOTE 1
tRP
tRAS
tRPC
tCP
tCSR
tCHR
tRPC
tCSR
tCHR
tWRP tWRH
OPEN
tWRP tWRH
DON’T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL
tASR
tCHR
tCP
tCRP
tCSR
tRAH
-5
MIN
MAX
0
8
8
5
5
9
-6
MIN
MAX
0
10
10
5
5
10
UNITS
ns
ns
ns
ns
ns
ns
SYMBOL
tRAS
tRC
tRP
tRPC
tWRH
tWRP
-5
MIN
MAX
50
10,000
84
30
5
8
8
-6
MIN
MAX
60
10,000
104
40
5
10
10
UNITS
ns
ns
ns
ns
ns
ns
NOTE: 1. End of first CBR REFRESH cycle.
1 Meg x 16 EDO DRAM
D52_B.p65 – Rev. B; Pub. 3/01
20
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc