RAS#
V IH
V IL
CASL#/CASH#
V IH
V IL
ADDR
V IH
V IL
WE#
V IH
V IL
DQ
V
V
IOH
IOL
OE#
V IH
V IL
16Mb: 1 MEG x16
EDO DRAM
EDO-PAGE-MODE EARLY WRITE CYCLE
tRASP
tRP
tCRP
tCSH
tPC
tRSH
tRCD
tCAS, tCLCH
tCP
tCAS, tCLCH
tCP
tCAS, tCLCH
tCP
tASR
tRAD
tRAH
tAR
tACH
tASC
tCAH
ROW
tWCS
COLUMN
tCWL
tWCH
tWP
tACH
tASC
tCAH
COLUMN
tWCS
tCWL
tWCH
tWP
tACH
tASC
tCAH
COLUMN
tWCS
tCWL
tWCH
tWP
ROW
tWCR
tDS
tDH
VALID DATA
tDS
tDH
VALID DATA
tRWL
tDS
tDH
VALID DATA
DON’T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL
tACH
tAR
tASC
tASR
tCAH
tCAS
tCLCH
tCP
tCRP
tCSH
tCWL
tDH
tDS
-5
MIN
MAX
12
38
0
0
8
8
10,000
5
8
5
38
8
8
0
-6
MIN
MAX
15
45
0
0
10
10
10,000
5
10
5
45
10
10
0
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
tPC
tRAD
tRAH
tRASP
tRCD
tRP
tRSH
tRWL
tWCH
tWCR
tWCS
tWP
MIN
20
9
9
50
11
30
13
13
8
38
0
5
-5
MAX
125,000
MIN
25
12
10
60
14
40
15
15
10
45
0
5
-6
MAX
125,000
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1 Meg x 16 EDO DRAM
D52_B.p65 – Rev. B; Pub. 3/01
16
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc