5P49V5901BDDDNLGI 데이터 시트보기 (PDF) - Integrated Device Technology
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5P49V5901BDDDNLGI Datasheet PDF : 37 Pages
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5P49V5901 DATASHEET
Table 21:AC Timing Electrical Characteristics
(VDDO = 3.3V+5% or 2.5V+5% or 1.8V ±5%, TA = -40°C to +85°C)
(Spread Spectrum Generation = OFF)
Symbol Parameter
fIN 1 Input Frequency
Test Conditions
Input frequency limit (XIN)
Input frequency limit (CLKIN)
Min.
8
1
fOUT Output Frequency
fVCO
fPFD
fBW
t2
VCO Frequency
PFD Frequency
Loop Bandwidth
Input Duty Cycle
t3 5 Output Duty Cycle
Slew Rate, SLEW[1:0] = 00
Slew Rate, SLEW[1:0] = 01
Slew Rate, SLEW[1:0] = 10
Slew Rate, SLEW[1:0] = 11
Slew Rate, SLEW[1:0] = 00
t4 2
Slew Rate, SLEW[1:0] = 01
Slew Rate, SLEW[1:0] = 10
Slew Rate, SLEW[1:0] = 11
Slew Rate, SLEW[1:0] = 00
Slew Rate, SLEW[1:0] = 01
Slew Rate, SLEW[1:0] = 10
Slew Rate, SLEW[1:0] = 11
Rise Times
t5
Fall Times
Rise Times
Fall Times
Single ended clock output limit (LVCMOS)
Differential cock output limit (LVPECL/
LVDS/HCSL)
VCO operating frequency range
PFD operating frequency range
Input frequency = 25MHz
Duty Cycle
Measured at VDD/2, all outputs except
Reference output OUT0, VDDOX= 2.5V or
3.3V
Measured at VDD/2, all outputs except
Reference output OUT0, VDDOX=1.8V
Measured at VDD/2, Reference output
OUT0 (5MHz - 120MHz) with 50% duty
cycle input
Measured at VDD/2, Reference output
OUT0 (150.1MHz - 200MHz) with 50% duty
cycle input
Single-ended 3.3V LVCMOS output clock
rise and fall time, 20% to 80% of VDDO
(Output Load = 5 pF) VDDOX=3.3V
Single-ended 2.5V LVCMOS output clock
rise and fall time, 20% to 80% of VDDO
(Output Load = 5 pF) VDDOX=2.5V
Single-ended 1.8V LVCMOS output clock
rise and fall time, 20% to 80% of VDDO
(Output Load = 5 pF) VDDOX=1.8V
LVDS, 20% to 80%
LVDS, 80% to 20%
LVPECL, 20% to 80%
LVPECL, 80% to 20%
1
1
2500
11
0.06
45
45
40
40
30
1.0
1.2
1.3
1.7
0.6
0.7
0.6
1.0
0.3
0.4
0.4
0.7
Typ.
50
50
50
50
50
2.2
2.3
2.4
2.7
1.3
1.4
1.4
1.7
0.7
0.8
0.9
1.2
300
300
400
400
Max.
40
200
200
350
2900
150
0.9
55
55
60
60
70
Units
MHz
MHz
MHz
MHz
MHz
MHz
%
%
%
%
%
V/ns
ps
MARCH 3, 2017
17
PROGRAMMABLE CLOCK GENERATOR
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