MT48H16M16LFF-8 데이터 시트보기 (PDF) - Micron Technology

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MT48H16M16LFF-8

256Mb: x16 MOBILE SDRAM

Micron Technology 

BURST READ/SINGLE WRITE

The burst read/single write mode is entered by pro-

gramming the write burst mode bit (M9) in the mode

register to a logic 1. In this mode, all WRITE commands

result in the access of a single column location (burst of

one), regardless of the programmed burst length. READ

commands access columns according to the pro-

grammed burst length and sequence, just as in the

normal mode of operation (M9 = 0).

ADVANCE

256Mb: x16

MOBILE SDRAM

Figure 23

Clock Suspend During READ Burst

T0

T1

T2

T3

T4

T5

T6

CLK

CKE

INTERNAL

CLOCK

COMMAND

READ

NOP

NOP

NOP

NOP

NOP

ADDRESS

BANK,

COL n

DQ

DOUT

n

DOUT

n+1

DOUT

n+2

DOUT

n+3

DON’T CARE

NOTE: For this example, CAS latency = 2, burst length = 4 or greater, and

DQM is LOW.

256Mb: x16 Mobile SDRAM

MobileRamY26L_A.p65 – Pub. 5/02

25

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2002, Micron Technology, Inc.

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