74VHCT240 데이터 시트보기 (PDF) - Fairchild Semiconductor
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74VHCT240 Datasheet PDF : 7 Pages
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March 1997
Revised March 1999
74VHCT240A
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHCT240A is an advanced high speed CMOS octal
bus transceiver fabricated with silicon gate CMOS technol-
ogy. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. The VHCT240A is an inverting 3-STATE
buffer having two active-LOW output enables. This device
is designed to be used as 3-STATE memory address driv-
ers, clock drivers, and bus oriented transmitter/receivers.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. These circuits prevent device destruction
due to mismatched supply and input/output voltages. This
device can be used to interface 5V to 3V systems and two
supply systems such as battery back up.
Note 1: Outputs in OFF-State
Features
s High Speed: tPD = 5.6 ns (typ) at VCC = 5V
s Power down protection is provided on inputs and
outputs
s Low power dissipation: ICC = 4 µA (max) @ TA = 25°C
s Pin and function compatible with 74HCT240
Ordering Code:
Order Number Package Number
Package Description
74VHCT240AM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74VHCT240ASJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT240AMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHCT240AN
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
OE1, OE2
I0–I7
O0–O7
Description
3-STATE Output Enable
Inputs
Outputs 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS500002.prf
www.fairchildsemi.com
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