Features
Freescale Semiconductor, Inc.
• Embedded SRAM (eSRAM)
— 100K (102,400 bytes) general-purpose internal SRAM
• Direct memory access controller (DMAC)
— Provides two memory-to-memory channels and four I/O-to-memory or memory-to-I/O
channels.
— Supports 8-bit and 16-bit FIFO and memory port size for data transfer.
— Supports modules shown in Table 1.
— Provides data transfer complete and error (burst time-out or request-out) interrupts to interrupt
controller. DMA burst length is configurable for each channel.
— Provides bus utilization control for memory channels.
— Generates DMA burst time-out error for both memory and I/O channels to terminate DMA
cycle when the burst cannot be completed in a programmed timing period.
— Generates DMA request time-out error for I/O channels to interrupt 68K core when a DMA
request is not expected during a programmed timing period.
— Supports repeat data transfer function.
— Supports block transfer function to speed up display functions such as image block movement
in LCD display, retrieval of pre-store image pattern, and window effect.
— Provides two external DMA request pins for external devices to initiate data transfer in memory
channels 0 and 1, respectively.
Table 1. Modules with DMA Support
Module
CSPI
UART 1 and 2
USB
MMC/SD
MSHC
ASP
I2C
PWM 1 and 2
Timer 1 and 2
RTC
Bootstrap
DMA Capability
Yes
Yes
Yes
Yes
Yes
Yes (enhanced ADC)
No
No
No
No
No
• LCD controller (LCDC)
— Support for single-screen (non-split), color or monochrome LCD panels and self-refresh-type
LCD panels
— Panel sizes and summary of color and monochrome support are shown in Table 2 on page 5 and
Table 3 on page 6
4
MC68SZ328 Product Brief
MOTOROLA
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