Dual, 256-Tap, Volatile, Low-Voltage,
Linear Taper Digital Potentiometer
START
CONDITION
SCL
1
2
SDA
CLOCK PULSE FOR
ACKNOWLEDGMENT
8
9
NOT ACKNOWLEDGE
Figure 6. Acknowledge
ACKNOWLEDGE
ACKNOWLEDGE
HOW CONTROL BYTE AND DATA
BYTE MAP INTO DEVICE REGISTERS
ACKNOWLEDGE
D15 D14 D13 D12 D11 D10 D9 D8
D7 D6 D5 D4 D3 D2 D1 D0
S
0A
A
AP
SLAVE ADDRESS
NOP/W
COMMAND BYTE
1 DATA BYTE
Figure 7. Command and Single Data Byte Received
Slave Address
The MAX5392 includes a 7-bit slave address (Figure 4).
The 8th bit following the 7th bit of the slave address is the
NOP/W bit. Set the NOP/W bit low for a write command
and high for a no-operation command. The device does
not support readback.
The device provides three address inputs (A0, A1, and
A2), allowing up to eight devices to share a common
bus (Table 1). The first 4 bits (MSBs) of the factory-set
slave addresses are always 0101. A2, A1, and A0 set the
next 3 bits of the slave address. Connect each address
input to VDD or GND. Each device must have a unique
address to share a common bus.
Message Format for Writing
Write to the devices by transmitting the device’s slave
address with NOP/W (8th bit) set to zero, followed by
at least 2 bytes of information. The first byte of informa-
tion is the command byte. The second byte is the data
byte. The data byte goes into the internal register of the
device as selected by the command byte (Figure 7 and
Table 2).
Table 1. Slave Addresses
ADDRESS INPUTS
A2
A1
A0
GND
GND
GND
GND
GND
VDD
GND
VDD
GND
GND
VDD
VDD
VDD
GND
GND
VDD
GND
VDD
VDD
VDD
GND
VDD
VDD
VDD
SLAVE ADDRESS
0101000
0101001
0101010
0101011
0101100
0101101
0101110
0101111
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