IDT6168LA 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT6168LA

CMOS STATIC RAM 16K (4K x 4-BIT)

Integrated Device Technology 

IDT6168SA/LA

CMOS STATIC RAM 16K (4K x 4-BIT)

MILITARY AND COMMERCIAL TEMPERATURE RANGES

DATA RETENTION CHARACTERISTICS (LA Version Only)

VLC = 0.2V, VHC = VCC – 0.2V

Symbol

Parameter

Test Condition

VDR

VCC for Data Retention

ICCDR

Data Retention Current

CS ≥ VHC

VIN ≥ VHC

or ≤ VLC

MIL.

COM’L.

tCDR(5)

Chip Deselect to Data

Retention Time

tR(5)

Operation Recovery Time

NOTES:

1. TA = +25°C.

2. at VCC = 2V

3. at VCC = 3V

4. tRC = Read Cycle Time.

5. This parameter is guaranteed by device characterization, but is not production tested.

Min.

2.0

—

—

—

—

0

tRC(2)

IDT6168LA

Typ.(1)

—

0.5(2)

1.0(3)

0.5(2)

1.0(3)

—

—

Max.

—

100(2)

150(3)

20(2)

30(3)

—

—

Unit

V

µA

µA

ns

ns

3090 tbl 10

LOW VCC DATA RETENTION WAVEFORM

VCC

4.5V

tCDR

CS

VIH

DATA

RETENTION

MODE

VDR ≥ 2V

VDR

4.5V

tR

VIH

3090 drw 03

AC TEST CONDITIONS

Input Pulse Levels

Input Rise/Fall Times

Input Timing Reference Levels

Output Reference Levels

AC Test Load

DATAOUT

255Ω

GND to 3.0V

5ns

1.5V

1.5V

See Figures 1 and 2

3090 tbl 11

5V

480Ω

30pF*

DATAOUT

255Ω

5V

480Ω

5pF*

Figure 1. AC Test Load

3090 drw 04

*Includes scope and jig capacitances

3090 drw 05

Figure 2. AC Test Load

(for tCHZ, tCLZ, tWHZ and tOW)

5.3

4

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