AT45DB321-TC 데이터 시트보기 (PDF) - Atmel Corporation

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AT45DB321-TC

32-megabit 2.7-volt Only Serial DataFlash®

Atmel Corporation 

Reset Timing (Inactive Clock Polarity Low Shown)

CS

SCK

RESET

SO

HIGH IMPEDANCE

SI

tREC

tRST

tCSS

HIGH IMPEDANCE

Command Sequence for Read/Write Operations (Except Status Register Read)

SI

CMD 8 bits 8 bits 8 bits

MSB

r X X X XXXX XXXX XXXX XXXX XXXX

LSB

Reserved for Page Address

larger densities (PA12-PA0)

Byte/Buffer Address

(BA9-BA0/BFA9-BFA0)

Notes: 1. “r” designates bits reserved for larger densities.

2. It is recommended that “r” be a logical “0” for densities of 32M bit or smaller.

3. For densities larger than 32M bit, the “r” bits become the most significant Page Address bit for the appropriate density.

10

AT45DB321

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