74LVCH16374ABQ 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LVCH16374ABQ Datasheet PDF : 19 Pages
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NXP Semiconductors
11. Waveforms
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
VI
nCP input
GND
VOH
nQn output
VOL
1/ fmax
VM
tW
t PHL
VM
VM
t PLH
001aaa256
Fig 7.
Measurement points are given in Table 8.
VOL and VOH are the typical output voltage levels that occur with the output load.
Clock (nCP) to output (nQn) propagation delays, clock pulse width, and the maximum frequency
VI
nCP input
GND
VI
nDn input
GND
VM
t su
th
VM
t su
th
VOH
nQn output
VOL
VM
001aaa257
Fig 8.
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable performance.
VOL and VOH are the typical output voltage levels that occur with the output load.
Data set-up and hold times for the nDn input to the nCP input
74LVC_LVCH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 23 March 2010
© NXP B.V. 2010. All rights reserved.
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