ADG836L 데이터 시트보기 (PDF) - Analog Devices

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ADG836L

0.5 Ω, CMOS, 1.65 V to 3.6 V, Dual SPDT/2:1 Mux

Analog Devices 

Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

1, 5

IN1, IN2

2, 4, 7, 9

S1A, S2A, S2B, S1B

3

GND

6, 10

D2, D1

8

VDD

IN1 1

10 D1

S1A 2 ADG836L 9 S1B

TOP VIEW

GND 3 (Not to Scale) 8 VDD

S2A 4

7 S2B

IN2 5

6 D2

Figure 2. Pin Configuration

Description

Logic Control Inputs.

Source Terminals. These pins may be an input or output.

Ground (0 V) Reference.

Drain Terminals. These pins may be an input or output.

Most Positive Power Supply Potential.

ADG836L

Rev. B | Page 7 of 14

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