AD8209WHRMZ-RL 데이터 시트보기 (PDF) - Analog Devices
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AD8209WHRMZ-RL Datasheet PDF : 16 Pages
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Data Sheet
4 mA to 20 mA Current Loop Receiver
The AD8209 can also be used in low current-sensing applica-
tions, such as the 4 mA to 20 mA current loop receiver shown
in Figure 28. In such applications, the relatively large shunt
resistor may degrade the common-mode rejection. Adding a
resistor of equal value on the low impedance side of the input
corrects this error.
5V
10Ω
1%
OUTPUT
+
BATTERY
–
10Ω
1%
+IN +VS NC OUT
AD8209
–IN GND A1 A2
CF
NC = NO CONNECT
Figure 28. 4 mA to 20 mA Current Loop Receiver
GAIN ADJUSTMENT
The default gain of the preamplifier and buffer are 7 V/V and
2 V/V, respectively, resulting in a composite gain of 14 V/V. With
the addition of external resistor(s) or trimmer(s), the gain can
be lowered, raised, or finely calibrated.
Gains Less than 14
Because the preamplifier has an output resistance of 100 kΩ, an
external resistor connected from Pin 3 and Pin 4 to GND decreases
the gain by the following factor (see Figure 29):
REXT/(100 kΩ + REXT)
5V
+
VDIFF
–
+IN +VS NC OUT
AD8209
–IN GND A1 A2
OUTPUT
GAIN
=
14REXT
REXT + 100kΩ
GAIN
REXT = 100kΩ 14 – GAIN
+
VCM
–
REXT
NC = NO CONNECT
Figure 29. Adjusting for Gains Less than 14
AD8209
The overall bandwidth is unaffected by changes in gain by using
this method, although there may be a small offset voltage due to
the imbalance in source resistances at the input to the buffer. In
many cases, this can be ignored, but if desired, the offset voltage can
be nulled by inserting a resistor in series with Pin 4. The resistor
used should be equal to 100 kΩ minus the parallel sum of REXT
and 100 kΩ. For example, with REXT = 100 kΩ (yielding a composite
gain of 7 V/V), the optional offset nulling resistor is 50 kΩ.
Gains Greater than 14
Connecting a resistor from the output of the buffer amplifier to
its noninverting input, as shown in Figure 30, increases the gain.
The gain is now multiplied by the factor
REXT/(REXT − 100 kΩ)
For example, it is doubled for REXT = 200 kΩ. Overall gains as
high as 50 are achievable in this way. Note that the accuracy of
the gain becomes critically dependent on the resistor value at
high gains. In addition, the effective input offset voltage at Pin 1
and Pin 8 (which is about six times the actual offset of A1) limits
the use of the part in high gain, dc-coupled applications.
5V
+
VDIFF
–
+IN +VS NC OUT
AD8209
–IN GND A1 A2
OUTPUT
GAIN
=
14REXT
REXT – 100kΩ
REXT
GAIN
REXT = 100kΩ GAIN – 14
+
VCM
–
POINT X
(SEE TEXT)
NC = NO CONNECT
Figure 30. Adjusting for Gains Greater than 14
A small offset voltage arises from an imbalance in source
resistances and the finite bias currents inherently present at the
input of A2. In most applications, this additional offset error is
comparable to the specified offset range and therefore introduces
negligible skew. However, it can be essentially eliminated by the
addition of a resistor in series with the parallel combination of
REXT and 100 kΩ (at point X in Figure 30) so the total resistance
is maintained at 100 kΩ. For example, at a gain of 20, when REXT
= 332 kΩ and the parallel combination of REXT and 100 kΩ is
77 kΩ, the series resistor placed at point X is 23 kΩ.
Rev. C | Page 13 of 16
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