XRT8001ID(1999) 데이터 시트보기 (PDF) - Exar Corporation

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XRT8001ID
(Rev.:1999)

XRT8001 WAN Clock

Exar Corporation 

XRT8001

Preliminary

Write Operation

Once the last address bit (A3) has been clocked into

the SDI input, the “Write” operation will proceed

through an idle period, lasting three SCLK periods.

Prior to the rising edge of SCLK Cycle # 9 (see Figure

11) the user must begin to apply the 8-bit data word,

that he/she wishes to write to the Microprocessor

Serial Interface,

onto the SDI input pin. The Microprocessor Serial

Interface will latch the value on the SDI input pin, on

the rising edge of SCLK. The user must apply this

word (D0 through D7) serially, in ascending order with

the LSB first.

CSB

SCLK

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

SDI

SDO

R/W A0 A1 A2 A3 0

High Z

0 A6 D0 D1 D2 D3 D4 D5 D6 D7

D0 D1 D2 D3 D4 0 0 0

Notes:

A4 and A5 are always “0”.

R/W = “1” for “Read” Operations

R/W = “0” for “Write” Operations

- Denotes a “don’t care” value

Figure 15. Microprocessor Serial Interface Data Structure

Simplified Interface Option

The user can simplify the design of the circuitry con-

necting to the Microprocessor Serial Interface by tying

both the SDO and SDI pins together, and reading data

from and/or writing data to this “combined” signal. This

simplification is possible because only one of these

signals are active at any given time. The inactive

signal will be tri-stated.

Rev. P1.00

32

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