LC74793, 74793JM
Command 5 (Output control command 1)
• First byte
DA 0 to 7
7
6
5
4
3
2
1
0
Register
—
—
—
—
—
—
—
—
Status
1
1
1
1
0
1
0
1
Contents
Function
First byte identification bit
Command 5 identification code.
Output control settings 1
• Second byte
DA 0 to 7
7
Register
—
6
SPO2
5
SPO1
4
SPO0
Status
0
0
1
0
1
0
1
Contents
Function
Second byte identification bit
SPO2
0
0
0
0
1
1
1
1
SPO1
0
0
1
1
0
0
1
1
SPO0
0
1
0
1
0
1
0
1
SEPout pin
CSYNC
Slice data amplitude
O/E
CLK (acquisition)
VCO 1/1
VCO 1/2
VCO 1/3
VCO 1/4
0
3
SJO1
SJO1 SJO0
1
0
0
0
1
0
2
SJO0
1
1
0
1
1
SYNCJDG pin
SYNCjdg
LOCK
SYNCdet
DXout (Sliced data)
0
Vertical signal falling edge detection
1
VNPSEL
1
Vertical signal rising edge detection
0
VSEP: About 8.9 µs (NTSC)
0
VSPSEL
1
VSEP: About 17.8 µs (NTSC)
Note: All registers are cleared to 0 when the IC is reset by the RST pin.
Notes
Notes
SEPOUT (pin 18) output switching
SYNCJDG (pin 8) output switching
Vertical signal acquisition polarity switching.
Only valid when internal vertical separation
used.
Internal vertical separation time switching
No. 5966-13/24