FX980L6 데이터 시트보기 (PDF) - CML Microsystems Plc

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FX980L6

TETRA Baseband Processor

CML Microsystems Plc 

TETRA Baseband Processor

FX980

1.5.4.3 Power Ramping and Control

One of the DACs has an additional feature which enables a set of values to be sequenced out at a

pre-selected frequency. This is aimed at enabling power ramping of a RF output with a suitable profile.

The sequence may be reversed for power down. The sequence of values is stored in a dedicated

RAM, which can be loaded via the serial interface.

1.5.5 IRQ Function

An interrupt request (IRQ) pin is provided for asynchronous communication with an external

processor. The IRQ (asserted low) will be asserted when any of the error or user information flags are

activated by an internal operation. Some examples of operations which may generate an IRQ are:

1. An attempt by the user to write to a full Tx data-input FIFO

2. An attempt is made by the Tx to read from the Tx data-input FIFO when it is empty.

3. An internal arithmetic overflow has occurred in an FIR filter.

The IRQ feature may also be used to establish the phasing of the received I and Q channel data from

the RxDat serial port should synchronisation be lost for any reason.

The cause of the IRQ can be obtained by reading the error flags register. All possible causes of an

IRQ are masked on reset. Mask status can be altered by writing to the IRQ mask register.

Note that default coefficients and settings have been optimised to maximise performance and should

not cause arithmetic overflows. However, use of non-default coefficients, large offset corrections or

large Tx phase adjustments may cause problems, which can be corrected by scaling down coefficients

or via the gain multiplier feature.

1.5.6 Serial Interface

All digital data I/O and control functions for the FX980 are via the serial interface. It is expected that

the FX980 will be used in conjunction with a DSP and/or other processor. The device has three serial

interface ports, each port is based on the industrial standard three wire serial interface. This interface

allows communication with standard DSP ICs using a minimum of external components. The three

serial interface ports are:

Cmd

Command port, generally this is an input port receiving commands and data from the host,

but may also be configured as a bi-directional I/O interface.

CmdRd Command read port, an output port to send command read data back to the host. Read

data is only sent on this port in response to a read command.

RxData

Receive data port, an output port to send receive data back to the host. Data is only

present on this interface when the Rx Data path is active. This port may also be

configured as the CmdRd port.

© 1997 Consumer Microcircuits Limited

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D/980/3

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