
ML6510
SYSTEM RESET LOW
VCC
RESET
ROMMSB
MCLK
MDIN
MDOUT
ML6510-80
TTL 1X
MODE
50
CLK0
FB0
50
CLK1
FB1
PCB TRACE 0
LOAD0
66 MHz
CL0
PCB TRACE 1
LOAD1
66 MHz
CL1
66MHz
TTL REFERENCE
CLKINH
CLKINL
LOCK
RCLKH RCLKL
66MHz
CLKINH CLKINL
RESET
ROMMSB
MCLK
MDIN
VCC
MDOUT
ML6510-80
PECL 0.5X
MODE
LOCK
ALL_CLOCK_READY
50
CLK7
FB7
LOAD7
PCB TRACE 7
66 MHz
CL7
50
CLK0
FB0
PCB TRACE 8
LOAD8
33 MHz
CL8
50
CLK1
FB1
PCB TRACE 9
LOAD9
33 MHz
CL9
50
CLK7
LOAD15
PCB TRACE 15
33 MHz
FB7
CL15
Figure 7. Example use of two ML6510-80 to generate multiple frequency clocks.
First ML6510-80 generates eight 66MHz clocks while second ML6510-80 takes 66MHz
small-swing reference from the first chip and generates eight 33MHz clocks.
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