5962F9751201V9A 데이터 시트보기 (PDF) - Intersil
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5962F9751201V9A
Intersil
5962F9751201V9A Datasheet PDF : 4 Pages
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Dynamic Burn-In Circuit
R1
FO
R1
HS-22620RH
HS9-22620RH-Q FLATPACK
1
18
2
17
3
+
16
4
-
15
5
14
6
-
13
+
7
12
8
11
9
10
V1
C1
R1
R2
R1
R2
C1
V2
NOTES:
1. V1 = +15V ±0.5V.
2. V2 = -15V ±0.5V.
3. R1 = 2.2kΩ, 1/8W min (5%).
4. R2 = 50Ω, 1/8W min (2%).
5. C1 = 0.1µF, 10%, one cap per V per socket.
6. F0 = 10kHz, ±10%, 50% duty cycle.
7. VIH = +100mV ±10mV.
8. VIL = -100mV ±10mV.
Radiation Exposure Circuit
1
18
R2
2
17
3
+
16
4
-
15
5
14
R2
6
-
13
+
7
12
8
11
9
10
V1
C1
R1
R2
R1
R2
C1
V2
NOTES:
9. V1 = +15V ±0.5V.
10. V2 = -15V ±0.5V.
11. R1 = 2.2kΩ, 1/8W min (5%).
12. R2 = 50Ω, 1/8W min (2%).
13. C1 = 0.1µF, ±10%, one cap per V per socket.
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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