ADV7194 데이터 시트보기 (PDF) - Analog Devices
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ADV7194 Datasheet PDF : 69 Pages
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ADV7194
5 V TIMING CHARACTERISTICS (VAA = 5 V ؎ 250 mV, VREF = 1.235 V, RSET1,2 = 1200 ⍀ unless otherwise noted. All
specifications TMIN to TMAX1 unless otherwise noted.)
Parameter
MPU PORT2
SCLOCK Frequency
SCLOCK High Pulsewidth, t1
SCLOCK Low Pulsewidth, t2
Hold Time (Start Condition), t3
Setup Time (Start Condition), t4
Data Setup Time, t5
SDATA, SCLOCK Rise Time, t6
SDATA, SCLOCK Fall Time, t7
Setup Time (Stop Condition), t8
ANALOG OUTPUTS2
Analog Output Delay
DAC Analog Output Skew
Min Typ
0
0.6
1.3
0.6
0.6
100
0.6
8
0.1
Max Unit
400 kHz
µs
µs
µs
µs
ns
300 ns
300 ns
µs
ns
ns
Test Conditions
After This Period the First Clock Is Generated
Relevant for Repeated Start Condition
CLOCK CONTROL AND PIXEL
PORT3
fCLOCK
27
Clock High Time, t9
8
Clock Low Time, t10
8
Data Setup Time, t11
6
Data Hold Time, t12
5
Control Setup Time, t11
6
Control Hold Time, t12
4
Digital Output Access Time, t13
13
Digital Output Hold Time, t14
12
Pipeline Delay, t15 (2× Oversampling)
57
Pipeline Delay, t15 (4× Oversampling)
67
TELETEXT PORT4
Digital Output Access Time, t16
11
Data Setup Time, t17
3
Data Hold Time, t18
6
RESET CONTROL
Reset Low Time
3
PLL2
PLL Output Frequency
54
MHz
ns
ns
ns
ns
ns
ns
24 ns
ns
Clock Cycles
Clock Cycles
ns
ns
ns
20 ns
MHz
NOTES
1Temperature range TMIN to TMAX: 0°C to 70°C.
2Guaranteed by characterization.
3Pixel Port consists of the following:
Data: P0–P9, Y0/P10–Y9/P19,
Control: HSYNC, VSYNC, BLANK
Clock: CLKIN Input.
4Teletext Port consists of:
Digital Output: TTXRQ,
Data: TTX.
Specifications subject to change without notice.
–6–
REV. A
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