74161 데이터 시트보기 (PDF) - Philips Electronics

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74161

Presettable synchronous 4-bit binary counter; asynchronous reset

Philips Electronics 

Philips Semiconductors

Presettable synchronous 4-bit binary

counter; asynchronous reset

Product specification

74HC/HCT161

The shaded areas indicate when the input is permitted to change

for predictable output performance.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.11 Waveforms showing the set-up and hold times for the input (Dn) and parallel enable input PE.

The shaded areas indicate when the input is

permitted to change for predictable output

performance.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.12 Waveforms showing the CEP and CET set-up and hold times.

PACKAGE OUTLINES

See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.

December 1990

12

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