INTRODUCTION
The ST10F269Z2Qx is a derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 20 million instructions per second) with high peripheral functionality and enhanced I/O-capabilities. It also provides on-chip high-speed single voltage Flash memory, on-chip high-speed RAM, and clock generation via PLL.
ST10F269Z2Qx is processed in 0.35µm CMOS technology. The MCU core and the logic is supplied with a 5V to 3.3V on chip voltage regulator. The part is supplied with a single 5V supply and I/Os work at 5V.

■ HIGH PERFORMANCE 40MHz CPU WITH DSP FUNCTION
   – 16-BIT CPU WITH 4-STAGE PIPELINE
   – 50ns INSTRUCTION CYCLE TIME AT 40MHz MAX CPU CLOCK
   – MULTIPLY/ACCUMULATE UNIT (MAC) 16 x 16-BIT MULTIPLICATION, 40-BIT ACCUMULATOR
   – REPEAT UNIT
   – ENHANCED BOOLEAN BIT MANIPULATION FA CILITIES
   – ADDITIONAL INSTRUCTIONS TO SUPPORT HLL AND OPERATING SYSTEMS
   – SINGLE-CYCLE CONTEXT SWITCHING SUPPORT
■ MEMORY ORGANIZATION
   – 256K BYTE ON-CHIP FLASH MEMORY SINGLE VOLTAGE WITH ERASE/PROGRAM CONTROLLER
   – UP TO 1K ERASING/PROGRAMMING CYCLES
   – UP TO 16M BYTE LINEAR ADDRESS SPACE FOR CODE AND DATA (5M BYTES WITH CAN)
   – 2K BYTE ON-CHIP INTERNAL RAM (IRAM)
   – 10K BYTE ON-CHIP EXTENSION RAM (XRAM)
■ FAST AND FLEXIBLE BUS
   – PROGRAMMABLE EXTERNAL BUS CHARACTE RISTICS FOR DIFFERENT ADDRESS RANGES
   – 8-BIT OR 16-BIT EXTERNAL DATA BUS
   – MULTIPLEXED OR DEMULTIPLEXED EXTERNAL ADDRESS/DATA BUSES
   – FIVE PROGRAMMABLE CHIP-SELECT SIGNALS
   – HOLD-ACKNOWLEDGE BUS ARBITRATION SUP PORT
■ INTERRUPT
   – 8-CHANNEL PERIPHERAL EVENT CONTROLLER FOR SINGLE CYCLE INTERRUPT DRIVEN DATA TRANSFER
   – 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH 56 SOURCES, SAMPLING RATE DOWN TO 25ns
■ TIMERS
   – TWO MULTI-FUNCTIONAL GENERAL PURPOSE TIMER UNITS WITH 5 TIMERS
■ TWO 16-CHANNEL CAPTURE / COMPARE UNITS
■ A/D CONVERTER
   – 16-CHANNEL 10-BIT
   – 4.85µs CONVERSION TIME AT 40MHz CPU CLOCK
■ 4-CHANNEL PWM UNIT
■ SERIAL CHANNELS
   – SYNCHRONOUS / ASYNCHRONOUS SERIAL CHANNEL
   – HIGH-SPEED SYNCHRONOUS CHANNEL
■ TWO CAN 2.0B INTERFACES OPERATING ON ONE OR TWO CAN BUSSES (30 OR 2x15 MESSAGE OBJECTS)
■ FAIL-SAFE PROTECTION
   – PROGRAMMABLE WATCHDOG TIMER
   – OSCILLATOR WATCHDOG
■ ON-CHIP BOOTSTRAP LOADER
■ CLOCK GENERATION
   – ON-CHIP PLL
   – DIRECT OR PRESCALED CLOCK INPUT
■ REAL TIME CLOCK
■ UP TO 111 GENERAL PURPOSE I/O LINES
   – INDIVIDUALLY PROGRAMMABLE AS INPUT, OUTPUT OR SPECIAL FUNCTION
   – PROGRAMMABLE THRESHOLD (HYSTERESIS)
■ IDLE AND POWER DOWN MODES
■ SINGLE VOLTAGE SUPPLY: 5V ±10% (EMBEDDED REGULATOR FOR 3.3 V CORE SUPPLY).
■ TEMPERATURE RANGES: -40 +125°C, -40 to 85°C
■ 144-PIN PQFP PACKAGE