SN74LS109D データシート - Motorola => Freescale
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Motorola => Freescale
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY
The SN54/74LS109A consists of two high speed completely independent transition clocked JKflip-flops. The clocking operation is independent of rise andfall times of the clock waveform. The JKdesignallows operation as a D flip-flop by simply connecting the J and Kpins together.
Dual JK Positive Edge-Triggered Flip-Flop
Fairchild Semiconductor
Dual JK Positive Edge-Triggered Flip-Flop
Fairchild Semiconductor
Dual JK Positive Edge−Triggered Flip−Flop
ON Semiconductor
Dual JK Positive Edge-Triggered Flip-Flop
ON Semiconductor
Dual JK Positive Edge−Triggered Flip−Flop ( Rev : 2001 )
ON Semiconductor
Dual JK Positive Edge-Triggered Flip-Flop
ON Semiconductor
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP
Motorola => Freescale
Dual JK positive edge-triggered flip-flop
Motorola => Freescale
Dual JK Positive Edge−Triggered Flip−Flop
ON Semiconductor
Dual JK Positive Edge-Triggered Flip-Flop
AVG Semiconductors=>HITEK