
Intel
Introduction
This document contains the specifications for the 3 Volt Intel® Advanced+ Boot Block Flash Memory (C3) Stacked-Chip Scale Package (Stacked-CSP) device. Stacked memory solutions are offered in the following combinations: 32-Mbit flash + 8-Mbit SRAM, 32-Mbit flash + 4-Mbit SRAM, 16-Mbit flash + 4-Mbit SRAM, or 16-Mbit flash memory + 2-Mbit SRAM.
Product Overview
The C3 Stacked-CSP device combines flash and SRAM into a single package, and provides secure low-voltage memory solutions for portable applications. This memory family combines two memory technologies, flash memory and SRAM, in one package. The flash memory delivers enhanced security features, a block locking capability that allows instant locking/unlocking of any flash block with zero-latency, and a 128-bit protection register that enable unique device identification, to meet the needs of next generation portable applications. Improved 12 V production programming can be used to improve factory throughput.
Product Features
■ Flash Memory Plus SRAM
—Reduces Memory Board Space
Required, Simplifying PCB Design Complexity
■ Stacked-Chip Scale Package (Stacked CSP) Technology
—Smallest Memory Subsystem Footprint
—Area : 8 x 10 mm for 16Mbit (0.13 µm)
Flash + 2Mbit or 4Mbit SRAM
—Area : 8 x 12 mm for 32Mbit (0.13 µm)
Flash + 4Mbit or 8Mbit SRAM
—Height : 1.20 mm for 16Mbit (0.13 µm)
Flash + 2Mbit or 4Mbit SRAM and
32Mbit (0.13um) Flash + 8Mbit SRAM
—Height : 1.40 mm for 32Mbit (0.13 µm)
Flash + 4Mbit SRAM
—This Family also includes 0.25 µm and
0.18 µm technologies
■ Advanced SRAM Technology
—70 ns Access Time
—Low Power Operation
—Low Voltage Data Retention Mode
■ Intel® Flash Data Integrator (FDI) Software
—Real-Time Data Storage and Code
Execution in the Same Memory Device
—Full Flash File Manager Capability
■ Advanced+ Boot Block Flash Memory
—70 ns Access Time at 2.7 V
—Instant, Individual Block Locking
—128 bit Protection Register
—12 V Production Programming
—Ultra Fast Program and Erase Suspend
—Extended Temperature –25 °C to +85 °C
■ Blocking Architecture
—Block Sizes for Code + Data Storage
—4-Kword Parameter Blocks (for data)
—64-Kbyte Main Blocks (for code)
—100,000 Erase Cycles per Block
■ Low Power Operation
—Async Read Current: 9 mA (Flash)
—Standby Current: 7 µA (Flash)
—Automatic Power Saving Mode
■ Flash Technologies
—0.25 µm ETOX™ VI, 0.18 µm ETOX™
VII and 0.13 µm ETOX™ VIII Flash
Technologies
—28F160xC3, 28F320xC3