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PIC24HJ64GP802 データシート - Microchip Technology

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PIC24HJ64GP802

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Microchip Technology 

DEVICE OVERVIEW
This document contains device specific information for the PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 and PIC24HJ128GPX02/X04 devices.

Operating Range:
• Up to 40 MIPS operation (at 3.0-3.6V):
    - Industrial temperature range (-40°C to +85°C)
    - Extended temperature range (-40°C to +125°C)
• Up to 20 MIPS operation (at 3.0-3.6V):
    - High temperature range (-40°C to +140°C)

High-Performance CPU:
• Modified Harvard architecture
• C compiler optimized instruction set
• 16-bit wide data path
• 24-bit wide instructions
• Linear program memory addressing up to 4M instruction words
• Linear data memory addressing up to 64 Kbytes
• 71 base instructions: mostly 1 word/1 cycle
• Flexible and powerful addressing modes
• Software stack
• 16 x 16 multiply operations
• 32/16 and 16/16 divide operations
• Up to ±16-bit shifts for up to 40-bit data

Direct Memory Access (DMA):
• 8-channel hardware DMA
• Up to 2 Kbytes dual ported DMA buffer area (DMA RAM) to store data transferred via DMA:
    - Allows data transfer between RAM and a peripheral while CPU is executing code (no cycle stealing)
• Most peripherals support DMA

On-Chip Flash and SRAM:
• Flash program memory (up to 128 Kbytes)
• Data SRAM (up to 8 Kbytes)
• Boot, Secure and General Security for program Flash

Timers/Capture/Compare/PWM:
• Timer/Counters, up to five 16-bit timers:
    - Can pair up to make two 32-bit timers
    - One timer runs as a Real-Time Clock with an external 32.768 kHz oscillator
    - Programmable prescaler
• Input Capture (up to four channels):
    - Capture on up, down or both edges
    - 16-bit capture input functions
    - 4-deep FIFO on each capture
• Output Compare (up to four channels):
    - Single or Dual 16-bit Compare mode
    - 16-bit Glitchless PWM mode
• Hardware Real-Time Clock and Calendar (RTCC):
    - Provides clock, calendar and alarm functions

Interrupt Controller:
• 5-cycle latency
• Up to 45 available interrupt sources
• Up to three external interrupts
• Seven programmable priority levels
• Five processor exceptions

Digital I/O:
• Peripheral pin Select functionality
• Up to 35 programmable digital I/O pins
• Wake-up/Interrupt-on-Change for up to 31 pins
• Output pins can drive from 3.0V to 3.6V
• Up to 5V output with open drain configuration
• All digital input pins are 5V tolerant
• 4 mA sink on all I/O pins
(Continue ...)

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