1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL

GENERAL DESCRIPTION
FOR 1M x 32Bit x 4 Bank DDR SDRAM
The K4D26323QG is 134,217,728 bits of hyper synchronous data rate Dynamic RAM organized as 4 x1,048,576 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous features with Data Strobe allow extremely high performance up to 3.6GB/s/chip. I/O transactions are possible on both edges of the clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance memory system applications.

FEATURES
• 1.8V ± 0.1V power supply for device operation
• 1.8V ± 0.1V power supply for I/O interface
• SSTL_18 compatible inputs/outputs
• 4 banks operation
• MRS cycle with address key programs
   -. Read latency 3, 4, 5 and 6 (clock)
   -. Burst length (2, 4 and 8)
   -. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock
• Differential clock input
• No Wrtie-Interrupted by Read Function
• 4 DQS’s ( 1DQS / Byte )
• Data I/O transactions on both edges of Data strobe
• DLL aligns DQ and DQS transitions with Clock transition
• Edge aligned data & data strobe output
• Center aligned data & data strobe input
• DM for write masking only
• Auto & Self refresh
• 32ms refresh period (4K cycle)
• 144-Ball FBGA
• Maximum clock frequency up to 500MHz
• Maximum data rate up to 1.0Gbps/pin