HD74LS273FPEL データシート - Renesas Electronics
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Renesas Electronics
The HD74LS273, positive-edge-triggered flip-flops utilize LS TTL circuitry to implement D-type flip-flop logic with a direct clear input.
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.
When the clock input is at either the high or low level, the D input signal has no effect at the output.
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DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
Motorola => Freescale
Dual D–type Positive Edge–triggered Flip Flops with Clear and Preset
Hitachi -> Renesas Electronics
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear)
Hitachi -> Renesas Electronics
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear)
Hitachi -> Renesas Electronics
Octal D-Type Edge-Triggered Flip-Flop with Clear
Fairchild Semiconductor
Octal D-type Flip-Flops (with Clear)
Renesas Electronics
Octal D-type Flip-Flops with Clear
Hitachi -> Renesas Electronics
Octal D-type Flip-Flops (with Clear)
Hitachi -> Renesas Electronics
Octal D-Type Flip-Flops with Clear
ON Semiconductor
Octal D-Type Flip-Flops with Clear ( Rev : 2005 )
Fairchild Semiconductor