datasheetbank_Logo
データシート検索エンジンとフリーデータシート
HOME  >>>  STMicroelectronics  >>> 74LVQ10 PDF

74LVQ10(2004) データシート - STMicroelectronics

74LVQ10 image

部品番号
74LVQ10

コンポーネント説明

Other PDF
  lastest PDF  

PDF
DOWNLOAD     

page
11 Pages

File Size
160.1 kB

メーカー
ST-Microelectronics
STMicroelectronics 

DESCRIPTION
The 74LVQ10 is a low voltage CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.
The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:
   tPD = 5.3ns (TYP.) at VCC = 3.3 V
■ COMPATIBLE WITH TTL OUTPUTS
■ LOW POWER DISSIPATION:
   ICC = 2µA (MAX.) at TA=25°C
■ LOW NOISE:
   VOLP = 0.3V (TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
   VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 10
■ IMPROVED LATCH-UP IMMUNITY

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 

部品番号
コンポーネント説明
ビュー
メーカー
Triple 3−Input NAND Gate
PDF
ON Semiconductor
Triple 3-input NAND gate
PDF
Philips Electronics
Triple 3-input NAND Gate
PDF
Hitachi -> Renesas Electronics
Triple 3-Input NAND Gate
PDF
Integral Corp.
Triple 3-Input NAND Gate
PDF
Motorola => Freescale
Triple 3-Input NAND Gate ( Rev : 2015 )
PDF
ON Semiconductor
Triple 3-Input NAND Gate
PDF
ON Semiconductor
Triple 3-Input NAND Gate
PDF
Motorola => Freescale
Triple 3-Input NAND Gate
PDF
System Logic Semiconductor
Triple 3-Input NAND Gate
PDF
System Logic Semiconductor

Share Link: GO URL

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]