datasheetbank_Logo
データシート検索エンジンとフリーデータシート
HOME  >>>  Nexperia B.V. All rights reserved  >>> 74LVC132AD PDF

74LVC132AD(2020) データシート - Nexperia B.V. All rights reserved

74LVC132A image

部品番号
74LVC132AD

コンポーネント説明

Other PDF
  lastest PDF  

PDF
DOWNLOAD     

page
14 Pages

File Size
236.8 kB

メーカー
NEXPERIA
Nexperia B.V. All rights reserved 

General description
   The 74LVC132A rovides four 2-input NAND gates with Schmitt trigger inputs. It is capable of transforming slowly-changing input signals into sharply defined, jitter-free output signals.
   The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.
   Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environment.

Features and benefits
• Wide supply voltage range from 1.2 V to 3.6 V
• 5 V tolerant inputs for interfacing with 5 V logic
• CMOS low-power consumption
• Direct interface with TTL levels
• Unlimited input rise and fall times
• Inputs accept voltages up to 5.5 V
• Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)
• ESD protection:
   • HBM JESD22-A114F exceeds 2000 V
   • MM JESD22-A115-B exceeds 200 V
   • CDM JESD22-C101E exceeds 1000 V
• Specified from -40 °C to +85 °C and -40 °C to +125 °C

Applications
• Wave and pulse shapers for highly noisy environments
• Astable multivibrator
• Monostable multivibrator.


Share Link: GO URL

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]