部品番号
74LV132
コンポーネント説明
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メーカー
Nexperia B.V. All rights reserved
74LV132 データシート - Nexperia B.V. All rights reserved
Nexperia B.V. All rights reserved
General description
The 74LV132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes.
This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.
Features and benefits
• Wide supply voltage range from 1.0 V to 5.5 V
• CMOS low power dissipation
• Optimized for low voltage applications: 1.0 V to 3.6 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8C (2.7 V to 3.6 V)
• JESD36 (4.5 V to 5.5 V)
• ESD protection:
• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
• Multiple package options
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Applications
• Wave and pulse shapers for highly noisy environments
• Astable multivibrators
• Monostable multivibrators
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