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74F280SJ データシート - Fairchild Semiconductor

74F280 image

部品番号
74F280SJ

コンポーネント説明

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6 Pages

File Size
72.9 kB

メーカー
Fairchild
Fairchild Semiconductor 

General Description
The F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an
even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output.

 

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