部品番号
74AHC00PW-Q100
コンポーネント説明
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74AHC00PW-Q100 データシート - Nexperia B.V. All rights reserved
Nexperia B.V. All rights reserved
General description
The 74AHC00-Q100; 74AHCT00-Q100 are quad 2-input NAND gates. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.
Features and benefits
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Wide supply voltage range from 2.0 V to 5.5 V
• Input levels:
• For 74AHC00-Q100: CMOS level
• For 74AHCT00-Q100: TTL level
• Balanced propagation delays
• All inputs have Schmitt-trigger actions
• Overvoltage tolerant inputs to 5.5 V
• High noise immunity
• CMOS low power dissipation
• ESD protection:
• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
• Multiple package options
• DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
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