WE128K32N-140G4QA データシートの表示（PDF） - White Electronic Designs => Micro Semi
部品番号
コンポーネント説明
メーカー
WE128K32N-140G4QA Datasheet PDF : 15 Pages
| |||
WE128K32-XXX
WRITE
A write cycle is initiated when OE is high and a low pulse is on WE
or CS with CS or WE low. The address is latched on the falling
edge of CS or WE whichever occurs last. The data is latched by
the rising edge of CS or WE, whichever occurs first. A byte write
operation will automatically continue to completion.
WRITE CYCLE TIMING
Figures 5 and 6 show the write cycle timing relationships. A
write cycle begins with address application, write enable and
chip select. Chip select is accomplished by placing the CS line
low. Write enable consists of setting the WE line low. The
write cycle begins when the last of either CS or WE goes low.
The WE line transition from high to low also initiates an
internal 150 µsec delay timer to permit page mode operation.
Each subsequent WE transition from high to low that occurs
before the completion of the 150 µsec time out will restart the
timer from zero. The operation of the timer is the same as a
retriggerable one-shot.
AC WRITE CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C)
Write Cycle Parameter
Write Cycle Time, TYP = 6ms
Address Set-up Time
Write Pulse Width (WE or CS)
Chip Select Set-up Time
Address Hold Time
Data Hold Time
Chip Select Hold Time
Data Set-up Time
Output Enable Set-up Time
Output Enable Hold Time
Write Pulse Width High
Symbol Min
tWC
tAS
0
tWP 150
tCS
0
tAH 100
tDH
10
tCSH
0
tDS 100
tOES
10
tOEH
10
tWPH
50
Max Unit
10 ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
4
Share Link: 