CY7C1441AV25-133AXI データシートの表示（PDF） - Cypress Semiconductor

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CY7C1441AV25-133AXI

36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM

Cypress Semiconductor 

CY7C1441AV33

CY7C1443AV33

CY7C1447AV33

Logic Block Diagram – CY7C1447AV33 (512K x 72)

A0, A1,A

MODE

ADDRESS

REGISTER

A[1:0]

ADV

CLK

ADSC

ADSP

Q1

BINARY

COUNTER

CLR

Q0

BWH

BWG

BWF

BWE

BWD

BWC

BWB

BWA

BWE

GW

CE1

CE2

CE3

OE

ZZ

DQH, DQPH

WRITE DRIVER

DQF, DQPF

WRITE DRIVER

DQF, DQPF

WRITE DRIVER

DQE, DQPE

WRITE DRIVER

DQD, DQPD

WRITE DRIVER

DQC, DQPC

WRITE DRIVER

DQB, DQPB

WRITE DRIVER

DQA, DQPA

WRITE DRIVER

ENABLE

REGISTER

PIPELINED

ENABLE

SLEEP

CONTROL

DQH, DQPH

WRITE DRIVER

DQG, DQPG

WRITE DRIVER

DQF, DQPF

WRITE DRIVER

DBQYET,ED“QaP”E

WRITE DRIVER

DQD, DQPD

WRITE DRIVER

DQC, DQPC

WRITE DRIVER

DQB, DQPB

WRITE DRIVER

DQA, DQPA

WRITE DRIVER

MEMORY

ARRAY

SENSE

AMPS

OUTPUT

REGISTERS

OUTPUT

BUFFERS

E

INPUT

REGISTERS

DQs

DQPA

DQPB

DQPC

DQPD

DQPE

DQPF

DQPG

DQPH

Document #: 38-05357 Rev. *F

Page 3 of 31

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