AD7175-8 データシートの表示（PDF） - Analog Devices

部品番号

コンポーネント説明

メーカー

AD7175-8

24-Bit, 8-/16-Channel, 250 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers

Analog Devices 

AD7175-8

Parameter

Turn-On Settling Time

Short-Circuit Current, ISC

EXTERNAL REFERENCE INPUTS

Differential Input Range

Absolute Voltage Limits1

Input Buffers Disabled

Input Buffers Enabled

REF+/REF− Input Current

Input Buffers Disabled

Input Current

Input Current Drift

Input Buffers Enabled

Input Current

Input Current Drift

Normal Mode Rejection1

Common-Mode Rejection

TEMPERATURE SENSOR

Accuracy

Sensitivity

BURNOUT CURRENTS

Source/Sink Current

POWER-DOWN SWITCH

RON

Allowable Currents

GENERAL-PURPOSE INPUTS/OUTPUTS

(GPIO0, GPIO1, GPO2, GPO3)

Input Mode Leakage Current1

Floating State Output Capacitance

Output High Voltage, VOH1

Output Low Voltage, VOL1

Input High Voltage, VINH1

Input Low Voltage, VINL1

CLOCK

Internal Clock

Frequency

Accuracy

Duty Cycle

Output Low Voltage, VOL

Output High Voltage, VOH

Crystal

Frequency

Start-Up Time

External Clock (CLKIO)

Duty Cycle1

Test Conditions/Comments

100 nF REFOUT capacitor

VREF = (REF+) − (REF−)

External clock

Internal clock

See the Rejection parameter

After user calibration at 25°C

Analog input buffers must be enabled

With respect to AVSS

ISOURCE = 200 µA

ISINK = 800 µA

Min

Typ

200

25

1

2.5

AVSS − 0.05

AVSS

Data Sheet

Max

Unit

µs

mA

AVDD1

V

AVDD1 + 0.05 V

AVDD1

V

±72

±1.2

±6

±800

1.2

95

±2

470

±10

24

16

µA/V

nA/V/°C

nA/V/°C

nA

nA/°C

dB

°C

µV/K

µA

Ω

mA

−10

5

AVSS + 4

AVSS + 3

+10

µA

pF

V

AVSS + 0.4 V

V

AVSS + 0.7 V

16

MHz

−2.5%

+2.5%

%

50

%

0.4

V

0.8 × IOVDD

V

14

16

16.384

MHz

10

µs

16

16.384

MHz

30

50

70

%

Rev. 0 | Page 4 of 64

Share Link: