87004AGI データシートの表示（PDF） - Integrated Device Technology
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87004AGI Datasheet PDF : 15 Pages
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ICS87004I Data Sheet
Function Tables
Table 3A. PLL Enable Function Table
SEL3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
SEL2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
SEL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Inputs
SEL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR
Reference Frequency Range (MHz)
125 - 250
62.5 - 125
31.25 - 62.5
15.625 - 31.25
125 - 250
62.5 - 125
31.25 - 62.5
125 - 250
62.5 - 125
125 - 250
62.5 - 125
31.25 - 62.5
15.625 - 31.25
31.25 - 62.5
15.625 - 31.25
15.625 - 31.25
Outputs
PLL_SEL = 1
PLL Enable Mode
Q[0:3]
÷1
÷1
÷1
÷1
÷2
÷2
÷2
÷4
÷4
÷8
x2
x2
x2
x4
x4
x8
ICS87004AGI REVISION D JANUARY 4, 2010
3
©2009 Integrated Device Technology, Inc.
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