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ICS830-21I データシートの表示(PDF) - Integrated Circuit Systems

部品番号
コンポーネント説明
メーカー
ICS830-21I
ICST
Integrated Circuit Systems 
ICS830-21I Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Integrated
Circuit
Systems, Inc.
ICS83021I
1-TO-1
2.5V 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR
TABLE 4A. AC CHARACTERISTICS, VDD = 3.3V±0.3V, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
fMAX
t
PD
tsk(pp)
Output Frequency
Propagation Delay, NOTE 1
Part-to-Part Skew; NOTE 2, 3
ƒ350MHz
350
1.7
2.0
2.3
500
tjit
Buffer Additive Phase Jitter, RMS;
100MHz, Integration Range
refer to Additive Phase Jitter Section
(637kHz-10MHz)
0.21
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
0.8V to 2V
ƒ166MHz
166MHz < ƒ350MHz
100
250
400
45
50
55
40
50
60
All parameters measured at fMAX unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the output at V /2.
DD
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDD/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ns
ps
ps
ps
%
%
TABLE 4B. AC CHARACTERISTICS, VDD = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
fMAX
tPD
tsk(pp)
Output Frequency
Propagation Delay, NOTE 1
Part-to-Part Skew; NOTE 2, 3
ƒ350MHz
350
1.9
2.2
2.5
500
tjit
Buffer Additive Phase Jitter, RMS;
100MHz, Integration Range
refer to Additive Phase Jitter Section
(637kHz-10MHz)
0.21
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
ƒ250MHz
250MHz < ƒ350MHz
250
550
45
50
55
40
50
60
All parameters measured at fMAX unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the output at VDD/2.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDD/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ns
ps
ps
ps
%
%
83021AMI
www.icst.com/products/hiperclocks.html
4
REV. C DECEMBER 12, 2005

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