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74LVC1G38GV データシートの表示(PDF) - Nexperia B.V. All rights reserved

部品番号
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74LVC1G38GV
NEXPERIA
Nexperia B.V. All rights reserved 
74LVC1G38GV Datasheet PDF : 19 Pages
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Nexperia
74LVC1G38
2-input NAND gate; open drain
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9.
Symbol Parameter
Conditions
40 C to +85 C
Min Typ[1] Max
tpd
propagation delay A, B to Y; see Figure 8
[2]
VCC = 1.65 V to 1.95 V
1.0
3.0 10.0
VCC = 2.3 V to 2.7 V
0.5
1.8
6.0
VCC = 2.7 V
0.5
2.5
5.0
VCC = 3.0 V to 3.6 V
0.5
2.3
4.5
VCC = 4.5 V to 5.5 V
0.5
1.5
3.9
CPD
power dissipation VCC = 3.3 V;
capacitance
VI = GND to VCC
[3]
-
6
-
40 C to +125 C Unit
Min
Max
1.0
12.5 ns
0.5
7.5 ns
0.5
6.5 ns
0.5
5.7 ns
0.5
4.9 ns
-
-
pF
[1] Typical values are measured at Tamb = 25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPZL and tPLZ.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
12. AC waveforms
9,
$%LQSXW
*1'
9&&
<RXWSXW
92/
90
W3/=
9;
W3=/
90
DDE
Fig 8.
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
The input (A, B) to output (Y) propagation delays.
74LVC1G38
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 7 December 2016
© Nexperia B.V. 2017. All rights reserved
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