datasheetbank_Logo
データシート検索エンジンとフリーデータシート

ICS85222-02 データシートの表示(PDF) - Integrated Device Technology

部品番号
コンポーネント説明
メーカー
ICS85222-02
IDT
Integrated Device Technology 
ICS85222-02 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
1-TO-2, LVCMOS/LVTTL-TO-
DIFFERENTIAL HSTL TRANSLATOR
GENERAL DESCRIPTION
The ICS85222-02 is a 1-to-2 LVCMOS / LVTTL-to-
ICS
Differential HSTL translator and a member of the
HiPerClockS™ HiPerClocks™family of High Performance Clock
Solutions from IDT. The ICS85222-02 has one
single ended clock input. The single-ended clock
input accepts LVCMOS or LVTTL input levels and translates
them to HSTL levels. The small outline 8-pin SOIC package
makes this device ideal for applications where space, high
performance and low power are important.
ICS85222-02
FEATURES
Two differential HSTL outputs
One LVCMOS/LVTTL clock input
CLK input can accept the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 350MHz
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.25ns (maximum)
VOH: 1.4V (maximum)
Output crossover voltage: 0.68V - 0.9V
Full 3.3V operating supply voltage
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
Available in both standard and lead-free RoHS compliant
packages
BLOCK DIAGRAM
CLK Pulldown
Q0
nQ0
Q1
nQ1
PIN ASSIGNMENT
Q0 1
nQ0 2
Q1 3
nQ1 4
8 VDD
7 CLK
6 nc
5 GND
ICS85222-02
8-Lead SOIC
3.90mm x 4.92mm x 1.37mm body package
M Package
Top View
IDT/ ICSDIFFERENTIAL HSTL TRANSLATOR
1
ICS85222AM-02 REV. B SEPTEMBER 12, 2007

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]