LCK4801 データシートの表示（PDF） - Agere -> LSI Corporation
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LCK4801 Datasheet PDF : 10 Pages
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LCK4801
Low-Voltage HSTL Differential Clock
Preliminary Data Sheet
July 2001
Electrical Characteristics
Table 5. dc Characteristics
VDDA = VDDD = 3.3 V ± 5%, VDDHSTL = 1.7 V—2.1 V, TA = 0 °C—70 °C.
Symbol
Description
Min
Typ
Max
Unit
Condition
VIH
VIL
VCMR
VPP
VIN (dc)
VDIF (dc)
VCM (dc)
VOH
VOL
IDDI
IDDA
IDDO
ThetaJA
Input High Voltage
Input Low Voltage
Input High Voltage1
Input Low Voltage1
dc Input Signal Voltage
dc Differential Input
Voltage
dc Common Mode Input
Voltage
Output High Voltage
Output Low Voltage
Core Supply Current
PLL Supply Current
Output Supply Current
Junction to Ambient
Thermal Resistance
2.0
0.0
1
0.5
–0.3
0.4
0.4
VX + 0.3
0
—
—
—
—
—
VDDD
—
0.8
—
VDDD – 0.3
—
1
—
1.45
—
1.75
—
1.0
VX + 0.5
VX – 0.5
15
150
53
1.4
VX – 0.3
140
20
—
—
V
V
V
V
V
V
V
V
V
mA
mA
mA
°C/W
LVCMOS
LVCMOS
LVPECL
LVPECL2
HSTL3
HSTL4
HSTL5
HSTL6,1
HSTL6
—
—
—7
—8
1. dc levels will vary 1:1 with VDDD.
2. VPP characteristics required for ac specifications. Actual tolerance of VPP is 200 mV.
3. VIN (dc) specifies maximum dc excursion of each differential input.
4. The VDIF (dc) minimum is calculated by VOH – VOL, where VOH is the true input signal and VOL is the complementary input signal.
5. VCM specifies the maximum allowable voltage range of the input signal crosspoint.
6. VX is the differential output crosspoint voltage (see Table 6 on page 7).
7. Two PCLK signals to 25 Ω, and one EXTFB signal through 50 Ω.
8. 1.3 M/s (250 fpm) airflow.
6
Agere Systems Inc.
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