SA24C1024LEMW データシートの表示（PDF） - Saifun Semiconductors
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SA24C1024LEMW Datasheet PDF : 27 Pages
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SA24C1024 Datasheet
SAIFUN
10
Symbol
Parameter
100 kHz
Min Max
400 kHz
Min Max
1.7 MHz
Min Max
3.4 MHz
Min Max
Units
tRCL1
SCL Rise Time
(after repeated
START or after
ACK bit)
N/A N/A N/A
20
160
10
80
ns
tSU:DAT
Data In Setup Time
250
100
20
20
ns
tHD:DAT
Data In Hold Time
0
0
0
0
ns
tDH
Data Out Hold Time 200
100
0
0
ns
Noise Suppression
Time Constant at
TI
SCL, SDA Inputs
50
50
10
10
ns
(minimum VIN pulse
width)
tAA
SCL Low to SDA
Data Out Valid
3001 3500 1001 900
0
170
0
85
ns
Time the Bus Must
tBUF
Be Free Before a
New Transmission
4700
1300
320
160
ns
Can Start
tWR
Write Cycle Time
Endurance
10
10
10
10
ms
1 Million2
Cycles
1 The minimum value is defined in order to bridge the undefined part between VIH and VIL of the falling edge of SCL. The standard
value is 0 ns.
2 This parameter is not tested but ensured by characterization.
Bus Timing
Figure 6. Bus Timing
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