
EL7104
Timing Table
Input
Inverted
Output
EL7114
5V
2.5V
0
90%
10%
Non-inverted
Output
EL7104
90%
10%
Standard Test Configuration
tD1
tF
tR
tD2
tR
tF
Input
Signal
1
2
8
6
D.U.T.
7
4.7µF
Output
Signal
4
5
2000pF
Simplified Schematic
FN7113 Rev 2.00
July 6, 2006
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