Philips Semiconductors
P-channel enhancement mode vertical
D-MOS transistor
Product specification
BSP254; BSP254A
FEATURES
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
P-channel vertical D-MOS transistor
in a TO-92 variant envelope and
intended for use as a line current
interruptor in relay, high-speed and
line transformer drivers.
PINNING - TO-92 variant BSP254
PIN
DESCRIPTION
1 gate
2 drain
3 source
PINNING - TO-92 variant BSP254A
PIN
DESCRIPTION
1 source
2 gate
3 drain
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VDS
drain-source
voltage
− − −250 V
VGSO
gate-source
voltage
open drain
− − ±20 V
Yfs
ID
RDS(on)
Ptot
forward transfer ID = −200 mA; 100 200 −
mS
admittance
VDS = −25V
drain current (DC)
− − −0.2 A
drain-source
VGS = −10 V; −
10 15
Ω
on-state resistance ID = −200 mA
total power
dissipation
Tamb = 25 °C −
−
1
W
handbook, halfpa1ge
2
3
d
g
MAM147
s
Fig.1 Simplified outline and symbol.
April 1995
2