LC72711LW(2000) データシートの表示（PDF） - SANYO -> Panasonic

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LC72711LW
(Rev.:2000)

Mobile FM Multiplex Broadcast (DARC) Receiver IC

SANYO -> Panasonic 

Block Diagram

LC72711W, 72711LW

Vddd

Vssd

STNBY

RST

XOUT

XIN

MPXIN

Vdda

Vssa

7.2 MHz

LPF

1T delay

2T delay

Clock

regeneration

LPF

MSK correction

circuit

Synchronization

regeneration

PN decoding

Anti-aliasing

filter

Vref

Vref

76 kHz

-BPF

(SCF)

Output control (CPU interface) and

layer 4 CRC detection circuit

Timing

control

Error correction:

layer 2 CRC

Data

Address

Memory array

Pin Assignment

49

TIN

NC

Vssa

Vref

MPXIN

Vdda

FLOUT

CIN

NC

TPC1

TPC2

TEST

TOSEL1

TOSEL2

Vssd

XIN

64

1

LC72711W

LC72711LW

SQFP-64

32

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

16

(Top view)

No. 6167-8/29

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